FEATURES
Standard based modelling
The input of the design methodology is a model relying on existing standards, namely UML and additional OMG standard UML profiles, i.e. MARTE.
Productivity Advantages
The model-driven design framework around the UML/MARTE model supports a “single-source approach” and ESL design activities, which improve design productivity.
ESL design
The framework automates several ESL design activities, e.g., the production of functional models, of performance models, design space exploration, etc
Single Source Design
The UML/MARTE model is used as a single, centralized repository of all the information about the system relevant for the design. This leverages consistency and modelling efficiency.
A distinctive aspect of the modelling&design methodology is that it is centered on a single model of the system which captures all the information relevant for the design
The GESE group of the University of Cantabria has years of experience on teaching and research of electronic and system-level design languages. Along recent years, as a result of its collaborative research with other European research groups and relevant industry, the group has developped a modelling and design methodology supporting key aspects for the raise of productivity required for embedded system design. A distinctive aspect of the modelling&design methodology is that it is centered on a single model of the system which captures all the information relevant for the design. The model relies on the UML standard language and on standard profiles, like MARTE, which leverages portability and understandibility. The modelling methodology to capture relevant information for system-level design analysis, e.g. the application architecture, the platform architecture, and extra-functional properties. The modelling methodology enables also the capture of information required for system-level design activities, performance requirements, DSE parameters, and criticalities. As a result, a single model of the system serves for ensuring the consistency of the set of analysis, design decisions and implementation actions performed from the model. The system-level desing activities cover functional validation, schedulability analysis, performance analysis, and design space exploration. These activities are automated through a model-driven design framework developed around and starting from the aforementioned modelling methodology.
Funding
CONTREX
In CONTREX, accurate performance analysis (timing, energy and power) considering platform elements is enabled. Interfaces for co-simulation with SystemC and for automated Design Space Exploration, and a component-based UML-MARTE front-end is provided too.
Artemis
In the CRAFTERS project, the seminal idea and the development of thread-based parallelized native simulation kernel was developped. In this project, a easy-to-use UML/MARTE front-end is provided too.
Catrene
In HARP, further polishing of the VIPPE kernel was done, and main contributions are related to adding APIs or the user code, e.g. OpenMP. Moreover, a hardware estimation part was added, and other relevant features as the GUI for analysis of thread scheduling.